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Francesco Diotalevi

Chief Technician
Electronic Design Laboratory

Facility

Electronic Design Laboratory

Contacts

via Enrico Melen 83, Building B, seventh floor
+39 010 8172 213
Contact Me

About

Francesco Diotalevi

received the M.S. and Ph.D. degrees in electronic engineering, from the University of Genova (Italy), in 1996 and 2001 respectively. During his Ph.D. he worked on analog microelectronic supervised learning systems with emphasis in silicon implementation of neural networks.
In the 2001 he joined Accent S.p.A., a joint venture between ST Microelectronics and Cadence Design System,
as Senior Consulting Engineer. Here he worked for eight years as ASIC designer for several digital designs in different fields of applications such as automotive, fingerprint sensors and multimedia.
In 2009 he moved to the Istituto Italiano di Tecnologia (IIT) in Genoa joining to the TeleRobotics and Applications (TERA) Department. In 2011 he moved to the Robotic, Brain and Cognitive Sciences (RBCS) Department of IIT.
He is currently interested in low power computing systems for mobile robots and humanoids including FPGAs design, stereo vision and low power parallel architectures. He is also author of some international conference papers and patents.

Selected Publications

Patents

Book chapter

Journals

  • F. Boi, T. Moraitis, V. De Feo, F. Diotalevi, C. Bartolozzi, G. Indiveri and A. Vato, A Bidirectional Brain-Machine Interface Featuring a Neuromorphic Hardware Decoder, Frontiers in Neuroscience, vol 10, pp.: 563, ISSN: 1662-453X, 09 December 1016.
  • M. Crepaldi, G.N. Angotzi, A. Maviglia, F. Diotalevi, and L. Berdondini, "A 5 pJ/pulse at 1-Gpps Pulsed Transmitter Based on Asynchronous Logic Master-Slave PLL Synthesis", IEEE Transaction on CIRCUITS AND SYSTEMS, vol.65, no.3, March 2018, pp 1096-1109, ISSN 1549-8328.

International Reviews

  • M. Valle, F. Diotalevi, A Dedicated Very Low Power Analog VLSI Architecture for Smart Adaptive Systems, Special Issue on Hardware Implementations of Soft Computing Techniques, Applied Soft Computing, Elsevier Science Publisher, No 4, 2004, pp. 206 - 226, (ISSN: 1568-4946).

International conference proceedings

  • D. Baratta, D.D. Caviglia, F. Diotalevi, M. Valle, R. Parenti, Leap-frog: a Programmable VLSI Neural Processor Architecture for Real-Time MLP-based Neural Networks Implementation, in Proc. of the 6th International Conference on Microelectronics for Neural Networks, Evolutionary & Fuzzy Systems MicroNeuro’97, printed in Dresden, Germany, Dresden (Germany), Sept. 24 - 26, 1997, pp. 25 - 30 (ISBN: 3 – 86005 – 190 – 3).

  • D. Baratta, G. M. Bo, D. D. Caviglia, F. Diotalevi, and M. Valle, Microelectronic Implementation of Artificial Neural Networks, in Proc. of the 5th Electronic Devices and Systems Conference 1998 EDS'98, published by the Technical University of Brno, printed in Brno, June 11 - 12 1998, Brno, Czech Republic, pp. VI – IX (ISBN: 80 – 214 – 1198 – 8).

  • D. Baratta, F. Diotalevi, M. Valle and D. D. Caviglia, Gradient Descent Learning Algorithms for Hierarchical Neural Networks: A Case Study in Industrial Quality Control, in Proc. of the International Conference on Artificial and Natural Neural Networks IWANN’99, Springer – Verlag, printed in Germany, Alicante, Spain, 2 – 4 June 1999, Vol. II pp 578 – 587 (ISBN: 3 – 540 – 66068 – 2).

  • F. Diotalevi, G.M. Bo, D.D. Caviglia, and M. Valle, Evaluation and Validation of Local and Adaptive Weight Perturbation Learning Algorithms for Optical Character Recognition Applications, in Proc. of the Third International ICSC Symposia on Intelligent Industrial Automation (IIA'99) and Soft Computing (SOCO'99), ICSC Academic Press, Canada/Switzerland, Genova, 1-4 June, 1999, pp. 508 - 512 (ISBN: 3 - 906454 - 17 – 7).

  • F. Diotalevi, M. Valle, G.M. Bo, E. Biglieri, and D.D. Caviglia, Analog CMOS Current Mode Neural Primitives, ISCAS'2000, IEEE International Symposium on Circuits and Systems, IEEE Press, Piscataway, NJ, Geneva, Switzerland, 28 – 31 May, 2000, pp. I 419 – I 422 (ISBN: 0 – 7803 – 5485 – 0).

  • F. Diotalevi, M. Valle, G.M. Bo, E. Biglieri, and D.D. Caviglia, An Analog On-Chip Learning Circuit Architecture of the Weight Perturbation Algorithm, ISCAS'2000, IEEE International Symposium on Circuits and Systems, IEEE Press, Piscataway, NJ, Geneva, Switzerland, 28 – 31 May, 2000, pp. II 717 – II 720 (ISBN: 0 – 7803 – 5485 – 0).

  • F. Diotalevi, M. Valle, and D.D. Caviglia, Evaluation of Gradient Descent Learning Algorithms with An Adaptive Local Rate Technique for Hierarchical Feed Forward Architectures, IEEE-INNS-ENNS International Joint Conference on Neural Networks, IEEE Press, Piscataway, NJ, Como, Italy, 24 - 27 July, 2000 (ISBN: 0 – 7695 – 0619 – 4).

  • F. Diotalevi, M. Valle, G.M. Bo and D.D. Caviglia, A VLSI Architecture for Weight Perturbation On Chip Learning Implementation, IEEE-INNS-ENNS International Joint Conference on Neural Networks, IEEE Press, Piscataway, NJ, Como, Italy, 24 - 27 July, 2000 (ISBN: 0 – 7695 – 0619 – 4).

  • F. Diotalevi, M. Valle, Weight perturbation learning algorithm with local learning rate adaptation for the classification of remote-sensing images, 9th European Symposium on Artificial Neural Networks, ESANN’01, Bruges (Belgium), 25 – 27 April, 2001, pp. 217 - 222 (D-Facto Publisher, B 1140 Evere, Belgium, ISBN 2 – 930307-01-3).

  • F. Diotalevi, M. Valle, An analog CMOS four quadrant current-mode multiplier for low power artificial neural networks implementation, 15th European Conference on Circuit Theory and Design, ECCTD’01: "Circuit Paradigm in the 21st Century", Helsinki University of Technology, Espoo, Finland, 28 – 31 august 2001, pp. III – 325 – III 328 (ISBN: 951 – 22 – 5572 – 3).

  • F. Diotalevi, A. Fijany, M. Montvelishsky and J-G. Fontaine, “Very Low Power Parallel Implementation of Stereo Vision Algorithm on a Solar Cell Powered MIMD Many Core Architecture”, 2011 IEEE Aerospace Conference, March 5-12, 2011, Big Sky, Montana, pp. 1-13 (ISBN: 978-1-4244-7350-2).

  • S. Safari, A. Fijany, F. Diotalevi, F. Hosseini, "Highly parallel and fast implementation of stereo vision algorithms on MIMD many-core Tilera architecture", 2012 IEEE Aerospace Conference, March 3-10, 2012, Big Sky, Montana, pp. 1-11 (ISBN: 978-1-4577-0556-4).

  • A. Fijany, F.Diotalevi, “A cooperative search algorithm for highly parallel implementation of RANSAC for model estimation on Tilera MIMD architecture", 2012 IEEE Aerospace Conference, March 3-10, 2012, Big Sky, Montana, pp. 1-14 (ISBN: 978-1-4577-0556-4).
  • F. Boi, F.Diotalevi, F. Stefanini, G. Indiveri, C. Bartolozzi, A. Vato, "A modular configurable system for closed-loop bidirectional brain-machine interfaces", 7th Annual International IEEE EMBS Conference on Neural Engineering, Montpellier, France, 22 - 24 April, 2015.
  • Brayda L., Traverso F, Giuliani L., Diotalevi F., Repetto S., Sansalone S., Trucco A. and Sandini G., "Spatially selective binaural hearing aids". BodySenseUX Workshop on Full-Body and Multisensory Experience, ACM UBICOMP 2015 , Osaka, Japan, September 7-11, 2015.

  • Bartolozzi C., Motto Ros P., Diotalevi F., Jamali N., Natale L., Crepaldi M., Demarchi D., ”Event-driven encoding of off-the-shelf tactile sensors for compression and latency optimisation for robotic skin”, 2017 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS). September 24–28, 2017, Vancouver, BC, Canada

Papers on Alta Frequenza (AEI review)

  • F. Diotalevi, M. Valle, Analog CMOS Current Mode Primitives for Feed-Forward Neural Networks, Alta Frequenza, Rivista di Elettronica, edita da AEI, Vol. 12, No 1, Gennaio-Febbraio-Marzo 2001, pp. 63 – 67 (ISSN: 1120 – 1908).

  • F. Diotalevi, M. Valle, Stochastic Learning Algorithms for the Classification of Remote-Sensing Images, Alta Frequenza, Rivista di Elettronica, edita da AEI, Vol. 13, No 5, Settembre - Ottobre 2001, pp. 60 – 64 (ISSN: 1120 – 1908).

National conference proceedings

  • M. Valle, F. Diotalevi, G.M. Bo, E. Biglieri, and D.D. Caviglia, An Analog On-Chip Learning Architecture based on Weight Perturbation Algorithm and on Current Mode Translinear Circuits, in Proc. of the Eleventh Italian Workshop on Neural Nets (WIRN VIETRI-99), Vietri sul Mare (SA), 20 – 22 May 1999, Springer-Verlag, 1999, pp. 308 – 313 (ISBN: 1 – 85233 – 177 - 1).

 

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Accetta e chiudi

I numeri di IIT

L’Istituto Italiano di Tecnologia (IIT) è una fondazione di diritto privato - cfr. determinazione Corte dei Conti 23/2015 “IIT è una fondazione da inquadrare fra gli organismi di diritto pubblico con la scelta di un modello di organizzazione di diritto privato per rispondere all’esigenza di assicurare procedure più snelle nella selezione non solo nell’ambito nazionale dei collaboratori, scienziati e ricercatori ”.

IIT è sotto la vigilanza del Ministero dell'Istruzione, dell'Università e della Ricerca e del Ministero dell'Economia e delle Finanze ed è stato istituito con la Legge 326/2003. La Fondazione ha l'obiettivo di promuovere l'eccellenza nella ricerca di base e in quella applicata e di favorire lo sviluppo del sistema economico nazionale. La costruzione dei laboratori iniziata nel 2006 si è conclusa nel 2009.

Lo staff complessivo di IIT conta circa 1440 persone. L’area scientifica è rappresentata da circa l’85% del personale. Il 45% dei ricercatori proviene dall’estero: di questi, il 29% è costituito da stranieri provenienti da oltre 50 Paesi e il 16% da italiani rientrati. Oggi il personale scientifico è composto da circa 60 principal investigators, circa 110 ricercatori e tecnologi di staff, circa 350 post doc, circa 500 studenti di dottorato e borsisti, circa 130 tecnici. Oltre 330 posti su 1400 creati su fondi esterni. Età media 34 anni. 41% donne / 59 % uomini.

Nel 2015 IIT ha ricevuto finanziamenti pubblici per circa 96 milioni di euro (80% del budget), conseguendo fondi esterni per 22 milioni di euro (20% budget) provenienti da 18 progetti europei17 finanziamenti da istituzioni nazionali e internazionali, circa 60 progetti industriali

La produzione di IIT ad oggi vanta circa 6990 pubblicazioni, oltre 130 finanziamenti Europei e 11 ERC, più di 350 domande di brevetto attive, oltre 12 start up costituite e altrettante in fase di lancio. Dal 2009 l’attività scientifica è stata ulteriormente rafforzata con la creazione di dieci centri di ricerca nel territorio nazionale (a Torino, Milano, Trento, Parma, Roma, Pisa, Napoli, Lecce, Ferrara) e internazionale (MIT ed Harvard negli USA) che, unitamente al Laboratorio Centrale di Genova, sviluppano i programmi di ricerca del piano scientifico 2015-2017.

IIT: the numbers

Istituto Italiano di Tecnologia (IIT) is a public research institute that adopts the organizational model of a private law foundation. IIT is overseen by Ministero dell'Istruzione, dell'Università e della Ricerca and Ministero dell'Economia e delle Finanze (the Italian Ministries of Education, Economy and Finance).  The Institute was set up according to Italian law 326/2003 with the objective of promoting excellence in basic and applied research andfostering Italy’s economic development. Construction of the Laboratories started in 2006 and finished in 2009.

IIT has an overall staff of about 1,440 people. The scientific staff covers about 85% of the total. Out of 45% of researchers coming from abroad 29% are foreigners coming from more than 50 countries and 16% are returned Italians. The scientific staff currently consists of approximately 60 Principal Investigators110 researchers and technologists350 post-docs and 500 PhD students and grant holders and 130 technicians. External funding has allowed the creation of more than 330 positions . The average age is 34 and the gender balance proportion  is 41% female against 59% male.

In 2015 IIT received 96 million euros in public funding (accounting for 80% of its budget) and obtained 22 million euros in external funding (accounting for 20% of its budget). External funding comes from 18 European Projects, other 17 national and international competitive projects and approximately 60 industrial projects.

So far IIT accounts for: about 6990 publications, more than 130 European grants and 11 ERC grants, more than 350 patents or patent applications12 up start-ups and as many  which are about to be launched. The Institute’s scientific activity has been further strengthened since 2009 with the establishment of 11 research nodes throughout Italy (Torino, Milano, Trento, Parma, Roma, Pisa, Napoli, Lecce, Ferrara) and abroad (MIT and Harvard University, USA), which, along with the Genoa-based Central Lab, implement the research programs included in the 2015-2017 Strategic Plan.